الفهرس | Only 14 pages are availabe for public view |
Abstract In this thesis, we introduce a new design methodology for voltage to time converters (VTCs) circuits suitable for time - based analog -to - digital converters (TB - ADC). This new methodology has been tested by designing an 8- bit low power TB - ADC as one of the alternatives to the traditional ADCs. The proposed ADC consists of two stages. The {uFB01}rst stage is the VTC and the second stage is the time to digital converter (TDC). The percentage of digital to analog part is greater than the tradi - tional ADC and it is an Op - Amp - less design |