الفهرس 
IntroductionOnly 14 pages are availabe for public view
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Abstract
Deep neural networks have been one of the hottest research topics due to their wide applications and importance in industry. They are used in many fields and in different scopes such as speech recognition, object detection and autonomous vehicles. However, they call for huge computational burden to process the input data and do the inevitable heavy calculations in the form of matrix multiplications and accumulations.
Recurrent neural networks (RNNs) are considered to be among the most important types of neural networks especially for the applications where processing of a sequence of data comes to place. RNNs are in general computationally expensive and need a lot of processing time and power. Therefore, there is a strong need to reduce the processing time in order to use them in an embedded environment with limited resources.
In this thesis we present an accelerated field-programmable gate array (FPGA) design for RNNs with an emphasis on long short term memory neural networks (LSTMs). A new configurable block capable of calculating Tanh and Sigmoid activation functions is proposed and analysed. The solution is based on a look-up table and additional simple math operations, which leads to a speedup of the proposed model of the neural network.
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